This invention relates to a cross-connection network comprising first and second matrix switching units.
In the manner which will later be described more in detail, a conventional cross-connection network comprises first through N-th input lines, a branching circuit, first and second matrix switching units, a controller, and first through N-th transmit switching circuits, where N represents an integer greater than one.
The first through the N-th input lines receive first through N-th input digital signals, respectively. The branching circuit has first through N-th input terminals, primary first through primary N-th output terminals, and secondary first through secondary N-th output terminals. The first through the N-th input terminals are connected to the first through the N-th input lines, to the primary first through the primary N-th output terminals, and to the secondary first through the secondary N-th output terminals, respectively.
The first matrix switching unit has primary first through primary N-th matrix input terminals identified by primary input terminal codes, respectively, and primary first through primary N-th matrix output terminals identified by primary output terminal codes, respectively. The first matrix switching unit comprises primary first through primary M-th matrix switching circuits arranged in a plurality of rows and a plurality of columns, where M represents an integer greater than four. The primary first through the primary N-th matrix input terminals are connected to the primary first through the primary N-th output terminals, respectively. The first matrix switching unit selectively connects the primary first through the primary N-th matrix input terminals to the primary first through the primary N-th matrix output terminals.
The second matrix switching unit has secondary first through secondary N-th matrix input terminals identified by secondary input terminal codes, respectively, and secondary first through secondary N-th matrix output terminals identified by secondary output terminal codes, respectively. The second matrix switching unit comprises secondary first through secondary M-th matrix switching circuits arranged in a plurality of rows and a plurality of columns. The secondary first through the secondary N-th matrix input terminals are connected to the secondary first through the secondary N-th output terminals, respectively. The second matrix switching unit selectively connects the secondary first through the secondary N-th matrix input terminals to the secondary first through the secondary N-th matrix output terminals.
The controller comprises a memory and a control unit. The memory memorizes connection information signals indicating, in correspondence to the primary and the secondary input terminal codes, designated ones, not greater in number than N, of the primary output terminal codes and of the secondary output terminal codes. The control unit is connected to the memory and the first and the second matrix switching units. The control unit controls in accordance with the connection information signals the first matrix switching unit to make the first matrix switching unit cross connect the primary first through the primary N-th matrix input terminals to ones of the primary first through the primary N-th matrix output terminals that are identified by the designated ones of the primary output terminal codes. The control unit controls the second matrix switching unit to make the second matrix switching unit cross connect the secondary first through the secondary N-th matrix input terminals to ones of the secondary first through the secondary N-th matrix output terminals that are identified by the designated ones of the secondary output terminal codes.
The first through the N-th transmit switching circuits comprise primary first through primary N-th transmit input terminals, secondary first through secondary N-th transmit input terminals, first through N-th transmit output terminals, primary first through primary N-th abnormal signal detectors, and secondary first through secondary N-th abnormal signal detectors, respectively. The primary first through the primary N-th transmit input terminals are connected to the primary first through the primary N-th matrix output terminals, respectively. The primary first through the primary N-th transmit input terminals receive the first through the N-th input digital signals through the branching circuit and the first matrix switching unit, respectively. The secondary first through the secondary N-th transmit input terminals are connected to the secondary first through the secondary N-th matrix output terminals, respectively. The secondary first through secondary N-th transmit input terminals receive the first through the N-th input digital signals through the branching circuit and the second matrix switching unit, respectively. The primary first through the primary N-th abnormal signal detectors detects primary abnormalities of the first through the N-th input digital signals supplied thereto, respectively. The secondary first through the secondary N-th abnormal signal detectors detects secondary abnormalities of the first through the N-th input digital signals supplied thereto, respectively. All of the first through the N-th transmit switching circuits supply the first through the N-th input digital signals from the primary first through the primary N-th transmit input terminals to the first through the N-th transmit output terminals, respectively, when one of the secondary first through the secondary N-th abnormal detectors detects one of the secondary abnormalities of the first through the N-th input digital signals. All of the first through the N-th transmit switching circuits supply the secondary first through the secondary N-th input digital signals from the secondary first through the secondary N-th transmit input terminals to the first through the N-th transmit output signals, respectively, when one of primary first through the primary N-th abnormal signal detectors detects one of the primary abnormalities of the first through the N-th input digital signals.
It is impossible to use the first matrix switching unit when a failure appears in each of the primary first through the primary M-th matrix switching circuits. It is impossible to use the second matrix switching unit when a failure appears in each of the secondary first through the secondary M-th matrix switching circuits. Consequently, the conventional cross-connection network system is impossible to reliably transmit transmission signals.